国产成人av大片在线观看,国产精品久免费的黄网站

TranslationMobile

編碼電路

"code" in Chinese : n. 1.法典；法規(guī)。 2.規(guī)則，準(zhǔn)則；(社會、階級等的 ...
"circuit" in Chinese : n. 1.(某一范圍的)周邊一圈；巡回，周游；巡回路線[ ...
"circuit code" in Chinese : 閉路碼; 電路碼
"cic circuit identification code" in Chinese : 電路識別碼; 線路識別碼
"circuit identification code" in Chinese : 電路識別碼
"circuit identification code cic" in Chinese : 電路識別碼
"code line circuit" in Chinese : 電碼線路
"code storage circuit" in Chinese : 編碼存儲電路; 編碼存儲線路; 代碼存儲電路
"reversed code track circuit" in Chinese : 反射電碼軌道電路
"packet circuit identity code pcic" in Chinese : 分組電路標(biāo)識碼
"tcic trunk circuit identification code" in Chinese : 干線電路識別碼
"code" in Chinese : n. 1.法典；法規(guī)。 2.規(guī)則，準(zhǔn)則；(社會、階級等的)慣例，習(xí)俗，制度。 ...
"in code" in Chinese : 用代碼
"no code" in Chinese : 無代碼
"of code" in Chinese : 開放式系統(tǒng)作業(yè)

Examples

The whole correlation - inheritance coding circuit system is designed , simulated and verified in verilog hdl on the candence systems
采用了硬件描述語言verilog對整個相關(guān)繼承矢量量化圖像編碼電路系統(tǒng)在cadence系統(tǒng)上進(jìn)行了西安理工大學(xué)碩士論文設(shè)計、仿真及時序驗證。
The circuit design mainly includes interface designs , such as address coding circuit , memory , human - machine , ad converter , the power , etc . the pcb was protracted and tested
電路設(shè)計主要包括譯碼電路設(shè)計、存儲器接口電路設(shè)計、人機(jī)接口電路設(shè)計、 ad轉(zhuǎn)換器電路設(shè)計、數(shù)控恒流源接口設(shè)計等。
Finally , considering the advantages and disadvantages of these algorithms , a trade - off algorithm is proposed . a corresponding vlsi coding circuit system is designed and verified with fpga
最后結(jié)合各個算法的優(yōu)點(diǎn)，綜合考慮各方面性能，給出一個折衷的快速搜索算法，并且設(shè)計出與算法對應(yīng)的編碼電路系統(tǒng)。
Based on a comprehensive research of image coding algorithm for correlation vq , novel algorithms are presented on two aspects in this paper , and corresponding vlsi coding circuit system is designed , simulated and verified
本論文在對相關(guān)矢量量化圖像編碼算法進(jìn)行深入分析的基礎(chǔ)上，在兩個方面提出了基于vlsi技術(shù)的新算法，并進(jìn)行了vlsi硬件設(shè)計、模擬仿真和時序驗證。
The inversionless bm algorithm in rs decoder is implemented with serial mode , which avoids the inversion computation and only needs 3 finite - field multipliers . thus , the complexity of hardware implementation has been mostly reduced . a 3 - level pipe - line processing architecture is also used in the hardware and the coding circuit in rs coder is optimized by using the characteristics of the finite - field constant multiplier
Rs解碼器的設(shè)計采用無逆bm算法,并利用串行方式來實(shí)現(xiàn)，不僅避免了求逆運(yùn)算，而且只需用3個有限域乘法器就可以實(shí)現(xiàn)，大大的降低了硬件實(shí)現(xiàn)的復(fù)雜度，并且因為在硬件實(shí)現(xiàn)上，采用了3級流水線（ pipe - line ）的處理結(jié)構(gòu)。